Retention characteristics of nano-floating gate capacitor with SiC nano-particles

Dong Uk Lee, Tae Hee Lee, Eun Kyu Kim

Research output: Contribution to journalArticle

Abstract

A nano-floating gate capacitor with SiC nano-particles embedded in a SiO2 layer was fabricated and its electrical properties such as the capacitance-voltage hysteresis curve at various temperature, and the retention were characterized. The SiC nano-particles in the SiO2 layer were formed by magnetron sputtering of SiC and SiO2 targets and post-annealing at 900 °C for 3 min. They had a spherical shape with an average diameter of 3 ∼ 5 nm and were distributed between the tunnel oxide and the control oxide layers. For the nano-floating gate capacitor with SiC nano-particles embedded in a SiO2 layer, the flat-band voltage shift decreased from 2.2 V at 25 °C to about 1.6 V at 85 °C and 0.6 V at 125 °C, when the gate voltages were swept from -8 V to 8 V. Also, the memory window under the programming/erasing operation at +12 V and -12 V for 700 ms appeared to be approximately 0.54 V at 25 °C, 0.61 V at 85 °C, and 0.22 V at 125 °C after 1 hr.

Original languageEnglish
Pages (from-to)2667-2670
Number of pages4
JournalJournal of the Korean Physical Society
Volume55
Issue number6 PART. 1
DOIs
StatePublished - 2009 Dec 1

Keywords

  • Nano-floating gate memory
  • Nonvolatile
  • Retention time
  • SiC nano-particle

Fingerprint Dive into the research topics of 'Retention characteristics of nano-floating gate capacitor with SiC nano-particles'. Together they form a unique fingerprint.

  • Cite this