Performance analysis and improvement of JPV primality test for smart IC cards

Hosung Jo, Heejin Park

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

JPV algorithm, proposed by Joye et al. was predicted to be faster than the combined prime generation algorithm but it runs slower in practice. This discrepancy is because only the number of Fermat test calls was compared in estimating a total running time. We present a probabilistic analysis on the total running time of JPV algorithm. This analysis is very accurate and corresponds to the experiment with only 1-2% error. Furthermore, we propose an improved JPV algorithm that uses Euclid function. It is faster than JPV algorithm and similar to the combined algorithm with the same space requirement.

Original languageEnglish
Title of host publication2014 International Conference on Big Data and Smart Computing, BIGCOMP 2014
PublisherIEEE Computer Society
Pages271-275
Number of pages5
ISBN (Print)9781479939190
DOIs
StatePublished - 2014 Jan 1
Event2014 International Conference on Big Data and Smart Computing, BIGCOMP 2014 - Bangkok, Thailand
Duration: 2014 Jan 152014 Jan 17

Publication series

Name2014 International Conference on Big Data and Smart Computing, BIGCOMP 2014

Other

Other2014 International Conference on Big Data and Smart Computing, BIGCOMP 2014
CountryThailand
CityBangkok
Period14/01/1514/01/17

Keywords

  • Primality test
  • Prime generation
  • Public-key cryptosystem

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    Jo, H., & Park, H. (2014). Performance analysis and improvement of JPV primality test for smart IC cards. In 2014 International Conference on Big Data and Smart Computing, BIGCOMP 2014 (pp. 271-275). [6741451] (2014 International Conference on Big Data and Smart Computing, BIGCOMP 2014). IEEE Computer Society. https://doi.org/10.1109/BIGCOMP.2014.6741451