Improvement of the current-voltage characteristics of a tunneling dielectric by barrier engineering by adopting an atomic-layer-deposited SiN layer for flash memory applications

Sug Hun Hong, Jae Hyuck Jang, Tae Joo Park, Doo Seok Jeong, Miyoung Kim, Cheol Seong Hwang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Scopus citations

Abstract

In this paper new and superior characteristics of an atomic layer deposited (ALD) SiN layer and SiN/SiO2/SiN multi layers as gate dielectric for flash memory application are reported. Field-sensitive characteristics compared to SiO2 were obtained by barrier profile engineering with a SiN/SiO2/SiN stack; a lower leakage current at a low field and a higher leakage current at a high field. The stacked dielectric layer showed F-N tunneling. However, the interfacial potential barrier profile was somewhat smoothed by chemical interaction between the individual layers. The interfacial trap density of this dielectric with an ALD SiN bottom layer was as low as 4x10-10/cm2eV near the mid-gap energy state, but the re-oxidation process degraded the interface quality. The degradation mechanism was studied using electrical analysis, XPS, and TEM.

Original languageEnglish
Title of host publicationProceedings of ESSDERC 2005
Subtitle of host publication35th European Solid-State Device Research Conference
Pages517-520
Number of pages4
DOIs
StatePublished - 2005 Dec 1
EventESSDERC 2005: 35th European Solid-State Device Research Conference - Grenoble, France
Duration: 2005 Sep 122005 Sep 16

Publication series

NameProceedings of ESSDERC 2005: 35th European Solid-State Device Research Conference
Volume2005

Other

OtherESSDERC 2005: 35th European Solid-State Device Research Conference
CountryFrance
CityGrenoble
Period05/09/1205/09/16

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    Hong, S. H., Jang, J. H., Park, T. J., Jeong, D. S., Kim, M., & Hwang, C. S. (2005). Improvement of the current-voltage characteristics of a tunneling dielectric by barrier engineering by adopting an atomic-layer-deposited SiN layer for flash memory applications. In Proceedings of ESSDERC 2005: 35th European Solid-State Device Research Conference (pp. 517-520). [1546698] (Proceedings of ESSDERC 2005: 35th European Solid-State Device Research Conference; Vol. 2005). https://doi.org/10.1109/ESSDER.2005.1546698