G-vector: a new model for glitch analysis in logic circuits

Ki-Seok Chung, Taewhan Kim, C. L. Liu

Research output: Contribution to journalArticle

3 Citations (Scopus)

Abstract

One of the major factors which contribute to the power consumption in CMOS combinational logic circuits is the switching activities in the circuits. Many of such switching activities are due to spurious pulses, called glitches. In this paper, we propose a new model for describing signals that contain glitches, called G-vector. Unlike the previous works in which their primary concern is modeling the propagation of glitches to count the number of glitches in the circuits, our G-vector provides a general, but effective model for generation, propagation and elimination of glitches, enabling us to not only count the number of glitches but also locate the glitches so that such information can be utilized by system tools for the reduction of the number of glitches in the circuits. We provide a set of experimental results to demonstrate the effectiveness of our model.

Original languageEnglish
Pages (from-to)235-251
Number of pages17
JournalJournal of VLSI Signal Processing Systems for Signal, Image, and Video Technology
Volume27
Issue number3
DOIs
StatePublished - 2001 Mar 1

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Logic circuits
Networks (circuits)
Combinatorial circuits
Electric power utilization

Cite this

@article{59267508cb5541e09fa30c268f29d559,
title = "G-vector: a new model for glitch analysis in logic circuits",
abstract = "One of the major factors which contribute to the power consumption in CMOS combinational logic circuits is the switching activities in the circuits. Many of such switching activities are due to spurious pulses, called glitches. In this paper, we propose a new model for describing signals that contain glitches, called G-vector. Unlike the previous works in which their primary concern is modeling the propagation of glitches to count the number of glitches in the circuits, our G-vector provides a general, but effective model for generation, propagation and elimination of glitches, enabling us to not only count the number of glitches but also locate the glitches so that such information can be utilized by system tools for the reduction of the number of glitches in the circuits. We provide a set of experimental results to demonstrate the effectiveness of our model.",
author = "Ki-Seok Chung and Taewhan Kim and Liu, {C. L.}",
year = "2001",
month = "3",
day = "1",
doi = "10.1023/A:1008139232134",
language = "English",
volume = "27",
pages = "235--251",
journal = "Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology",
issn = "1387-5485",
number = "3",

}

G-vector : a new model for glitch analysis in logic circuits. / Chung, Ki-Seok; Kim, Taewhan; Liu, C. L.

In: Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology, Vol. 27, No. 3, 01.03.2001, p. 235-251.

Research output: Contribution to journalArticle

TY - JOUR

T1 - G-vector

T2 - a new model for glitch analysis in logic circuits

AU - Chung, Ki-Seok

AU - Kim, Taewhan

AU - Liu, C. L.

PY - 2001/3/1

Y1 - 2001/3/1

N2 - One of the major factors which contribute to the power consumption in CMOS combinational logic circuits is the switching activities in the circuits. Many of such switching activities are due to spurious pulses, called glitches. In this paper, we propose a new model for describing signals that contain glitches, called G-vector. Unlike the previous works in which their primary concern is modeling the propagation of glitches to count the number of glitches in the circuits, our G-vector provides a general, but effective model for generation, propagation and elimination of glitches, enabling us to not only count the number of glitches but also locate the glitches so that such information can be utilized by system tools for the reduction of the number of glitches in the circuits. We provide a set of experimental results to demonstrate the effectiveness of our model.

AB - One of the major factors which contribute to the power consumption in CMOS combinational logic circuits is the switching activities in the circuits. Many of such switching activities are due to spurious pulses, called glitches. In this paper, we propose a new model for describing signals that contain glitches, called G-vector. Unlike the previous works in which their primary concern is modeling the propagation of glitches to count the number of glitches in the circuits, our G-vector provides a general, but effective model for generation, propagation and elimination of glitches, enabling us to not only count the number of glitches but also locate the glitches so that such information can be utilized by system tools for the reduction of the number of glitches in the circuits. We provide a set of experimental results to demonstrate the effectiveness of our model.

UR - http://www.scopus.com/inward/record.url?scp=0035280407&partnerID=8YFLogxK

U2 - 10.1023/A:1008139232134

DO - 10.1023/A:1008139232134

M3 - Article

AN - SCOPUS:0035280407

VL - 27

SP - 235

EP - 251

JO - Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology

JF - Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology

SN - 1387-5485

IS - 3

ER -