Dynamic power management for embedded processors in system-on-chip designs

Daecheol You, Ki-Seok Chung

Research output: Contribution to journalArticle

2 Citations (Scopus)

Abstract

Dynamic power management (DPM), which exploits low-power states of the target device, has been a key research issue to overcome the limited battery life of mobile devices. For efficient power management, today's power management unit in a system-on-chip for mobile devices supports multiple low-power states for embedded processors. Unfortunately, the DPM policies implemented in modern operating systems are not appropriate for processors because they may not understand the idleness of the processor accurately. There may be significant performance degradation if the DPM policy module misunderstands that the processor is idle even when there are many interrupt requests to handle. A novel DPM scheme for embedded processors considering the system response time as well as power reduction is proposed. Experimental results show that the proposed DPM policy achieves performance improvement by up to 25% compared to a conventional DPM policy with a similar amount of power reduction.

Original languageEnglish
Pages (from-to)1309-1310
Number of pages2
JournalElectronics Letters
Volume50
Issue number18
DOIs
StatePublished - 2014 Jan 1

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Mobile devices
Computer operating systems
Power management
System-on-chip
Degradation
Power management (telecommunication)

Cite this

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Dynamic power management for embedded processors in system-on-chip designs. / You, Daecheol; Chung, Ki-Seok.

In: Electronics Letters, Vol. 50, No. 18, 01.01.2014, p. 1309-1310.

Research output: Contribution to journalArticle

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