Design and implementation of GPU-based turbo decoder with a minimal latency

Heungseop Ahn, Yong Jin, Sangwook Han, Seungwon Choi, Sungsoo Ahn

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

Decoding latency of the turbo decoder has been a serious problem in real-time processing of communication systems. This paper presents a novel procedure of reducing the latency of the turbo decoder which has been implemented with GPU (Graphic Processing Unit). The main contribution of this paper is to present an efficient procedure of reducing the latency of GPU-based turbo decoder through an efficient parallel processing of maximum a posteriori (MAP). Through experimental tests, we have verified that the proposed turbo decoder reduces the latency from 34,767μs to 273μs per iteration.

Original languageEnglish
Title of host publicationISCE 2014 - 18th IEEE International Symposium on Consumer Electronics
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Print)9781479945924
DOIs
StatePublished - 2014 Jan 1
Event18th IEEE International Symposium on Consumer Electronics, ISCE 2014 - Jeju, Korea, Republic of
Duration: 2014 Jun 222014 Jun 25

Other

Other18th IEEE International Symposium on Consumer Electronics, ISCE 2014
CountryKorea, Republic of
CityJeju
Period14/06/2214/06/25

Fingerprint

Processing
Decoding
Communication systems
Graphics processing unit

Keywords

  • CUDA
  • GPU
  • parallel MAP decoder
  • Turbo decoder

Cite this

Ahn, H., Jin, Y., Han, S., Choi, S., & Ahn, S. (2014). Design and implementation of GPU-based turbo decoder with a minimal latency. In ISCE 2014 - 18th IEEE International Symposium on Consumer Electronics [6884510] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISCE.2014.6884510
Ahn, Heungseop ; Jin, Yong ; Han, Sangwook ; Choi, Seungwon ; Ahn, Sungsoo. / Design and implementation of GPU-based turbo decoder with a minimal latency. ISCE 2014 - 18th IEEE International Symposium on Consumer Electronics. Institute of Electrical and Electronics Engineers Inc., 2014.
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Ahn, H, Jin, Y, Han, S, Choi, S & Ahn, S 2014, Design and implementation of GPU-based turbo decoder with a minimal latency. in ISCE 2014 - 18th IEEE International Symposium on Consumer Electronics., 6884510, Institute of Electrical and Electronics Engineers Inc., 18th IEEE International Symposium on Consumer Electronics, ISCE 2014, Jeju, Korea, Republic of, 14/06/22. https://doi.org/10.1109/ISCE.2014.6884510

Design and implementation of GPU-based turbo decoder with a minimal latency. / Ahn, Heungseop; Jin, Yong; Han, Sangwook; Choi, Seungwon; Ahn, Sungsoo.

ISCE 2014 - 18th IEEE International Symposium on Consumer Electronics. Institute of Electrical and Electronics Engineers Inc., 2014. 6884510.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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AB - Decoding latency of the turbo decoder has been a serious problem in real-time processing of communication systems. This paper presents a novel procedure of reducing the latency of the turbo decoder which has been implemented with GPU (Graphic Processing Unit). The main contribution of this paper is to present an efficient procedure of reducing the latency of GPU-based turbo decoder through an efficient parallel processing of maximum a posteriori (MAP). Through experimental tests, we have verified that the proposed turbo decoder reduces the latency from 34,767μs to 273μs per iteration.

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Ahn H, Jin Y, Han S, Choi S, Ahn S. Design and implementation of GPU-based turbo decoder with a minimal latency. In ISCE 2014 - 18th IEEE International Symposium on Consumer Electronics. Institute of Electrical and Electronics Engineers Inc. 2014. 6884510 https://doi.org/10.1109/ISCE.2014.6884510