Boosted bit line program scheme for low operating voltage Mlcnand flash memory

Youngsun Song, Ki Tae Park, Unggon Kang, Heub Song, Gsoo Lee, Ngho Lim, Kang Deog Suh

Research output: Contribution to journalArticle

1 Scopus citations

Abstract

A boosted bit line program scheme is proposed for low operating voltage in the multi-level-cell (MLC) NAND flash memory. Our BL to BL boosting scheme, which uses the BL coupling capacitance, is applied to achieve a higher channel potential than is possible with Vcc, so that the Vpass window margin is improved by up to 59% in 40 nm MLC NAND flash memory with 2.7V V cc. In the case of 1.8V Vcc, the margin of the proposed scheme is 12% higher than one of the conventional schemes at 2.7V V cc.

Original languageEnglish
Pages (from-to)423-425
Number of pages3
JournalIEICE Transactions on Electronics
VolumeE93-C
Issue number3
DOIs
StatePublished - 2010 Jan 1

Keywords

  • Bit line
  • Boosted channel
  • Coupling capacitance
  • Vpass window margin

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