Architecture exploration of flash memory storage controller through a cycle accurate profiling

Hoeseung Jung, Sanghyuk Jung, Yong Ho Song

Research output: Contribution to journalArticle

11 Scopus citations


Recently, NAND flash memory has been widely adopted as a storage medium in various devices such as mobile phones, MP3 players, and digital cameras. In particular, Solid State Drives (SSDs), which are composed of multiple NAND flash memories, have gradually replaced hard disk drives (HDD). However, SSDs have an inherent weakness stemming from NAND flash memory and its complex architecture. This phenomenon makes it difficult to analyze and optimize the performance of SSD controllers. To overcome this weakness, highly accurate system simulations are needed for exploring architectural parameters to maximize the performance during the design phase. In this paper, we implement a simulator that considers all of the hardware components in SSD to assist in generating quantitatively accurate analysis when an algorithm or controller is realized. This simulator models the detailed characteristics of hardware components such as operation clock frequency and resource conflicts in order to represent SSD in great detail. In the experiments section, we verify the impacts of interface speed, page size, and other configuration parameters by using this cycle accurate simulator. These analysis results can then be used as raw data for optimization. 1

Original languageEnglish
Article number6131151
Pages (from-to)1756-1764
Number of pages9
JournalIEEE Transactions on Consumer Electronics
Issue number4
Publication statusPublished - 2011 Nov 1



  • NAND flash memory
  • Solid State Drive(SSD)
  • cycle accurate
  • simulator

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