This article describes a CMOS direct-conversion receiver for 5 GHz wireless LAN. Sub-harmonic mixing is used for down-conversion to minimize the DCoffset due to LO-leakage. The residual DC-offset is cancelled by a digital-toanalog converter at the output of the mixer. For quadrature down-conversion with sub-harmonic mixing, octa-phase LO signals are generated by an integer-N type frequency synthesizer. Implemented in a 0.18 μm CMOS technology, the receiver dissipates 97 mA from a 1.8 V supply, has a 6.5 dB noise figure (NF) and a -4 dBm input third-order intercept point (IIP3). The phase noise of the closedloop voltage-controlled oscillator (VCO) is -108 dBc/Hz at 1 MHz offset.
|Number of pages||3|
|Specialist publication||Microwave Journal|
|State||Published - 2007 Oct 1|