A direct-conversion receiver for 5 GHz wireless LAN with Sub-harmonic down-conversion

M. I.Young Lee, Chan Young Jeong, Jae Woo Park, Changsik Yoo, Jin Soo Park

Research output: Contribution to specialist publicationArticle

Abstract

This article describes a CMOS direct-conversion receiver for 5 GHz wireless LAN. Sub-harmonic mixing is used for down-conversion to minimize the DCoffset due to LO-leakage. The residual DC-offset is cancelled by a digital-toanalog converter at the output of the mixer. For quadrature down-conversion with sub-harmonic mixing, octa-phase LO signals are generated by an integer-N type frequency synthesizer. Implemented in a 0.18 μm CMOS technology, the receiver dissipates 97 mA from a 1.8 V supply, has a 6.5 dB noise figure (NF) and a -4 dBm input third-order intercept point (IIP3). The phase noise of the closedloop voltage-controlled oscillator (VCO) is -108 dBc/Hz at 1 MHz offset.

Original languageEnglish
Pages76-78
Number of pages3
Volume50
No10
Specialist publicationMicrowave Journal
StatePublished - 2007 Oct 1

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    Lee, M. I. Y., Jeong, C. Y., Park, J. W., Yoo, C., & Park, J. S. (2007). A direct-conversion receiver for 5 GHz wireless LAN with Sub-harmonic down-conversion. Microwave Journal, 50(10), 76-78.