A 4-MHz Bandwidth Continuous-Time Sigma-Delta Modulator with Stochastic Quantizer and Digital Accumulator

Donghyeok Jeong, Changsik Yoo

Research output: Contribution to journalArticleResearchpeer-review

Abstract

A 4-MHz bandwidth continuous-time (CT) sigma-delta modulator (SDM) is described. The CT-SDM employs a stochastic quantizer consisting of 63 comparators whose random input offset provides linear multi-bit quantization. The output of the stochastic quantizer is accumulated by a digital accumulator before feeding it back to the input of the loop filter of the CT-SDM, which greatly improves the linearity of the stochastic quantization. The CT-SDM implemented in a 65-nm CMOS technology shows the peak signal-to-noise+distortion ratio of 72.5-dB while consuming 3.6-mW from a 0.9-V supply.

Original languageEnglish
Article number8532284
Pages (from-to)1124-1128
Number of pages5
JournalIEEE Transactions on Circuits and Systems II: Express Briefs
Volume66
Issue number7
DOIs
StatePublished - 2019 Jul 1

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Modulators
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Keywords

  • CMOS
  • Sigma-delta modulator (SDM)
  • analog-to-digital converter (ADC)
  • continuous-time (CT)
  • input offset
  • stochastic quantizer

Cite this

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A 4-MHz Bandwidth Continuous-Time Sigma-Delta Modulator with Stochastic Quantizer and Digital Accumulator. / Jeong, Donghyeok; Yoo, Changsik.

In: IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 66, No. 7, 8532284, 01.07.2019, p. 1124-1128.

Research output: Contribution to journalArticleResearchpeer-review

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